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社区首页 >专栏 >LOCK Prefix (lock) Intel X86 IA-32 Assembly Language Reference Manual

LOCK Prefix (lock) Intel X86 IA-32 Assembly Language Reference Manual

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战神伽罗
发布于 2019-08-09 07:38:33
发布于 2019-08-09 07:38:33
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LOCK Prefix (lock)

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Operation

LOCK# -> NEXT Instruction

Description

The LOCK # signal is asserted during execution of the instruction following the lock prefix. This signal can be used in a multiprocessor system to ensure exclusive use of shared memory while LOCK # is asserted. The bts instruction is the read-modify-write sequence used to implement test-and-run.

The lock prefix works only with the instructions listed here. If a lock prefix is used with any other instructions, an undefined opcode trap is generated.

bt, bts, btr, btc

m, r/imm

xchg

r, m

xchg

m, r

add, or, adc, sbb, and, sub, xor

m, r/imm

not, neg, inc, dec

m

Memory field alignment does not affect the integrity of lock.

If a different 80386 processor is concurrently executing an instruction that has a characteristic listed here, locked access is not guaranteed. The previous instruction:

  • Does not follow a lock prefix
  • Is not on the previous list of acceptable instructions
  • A memory operand specified has a partial overlap with the destination operand.

Example

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