【日更计划079】数字IC基础题【HDL部分】

1)
initial begin
    a=0;
    b=1;
    c = #5 a+b;
end
2)
initial begin
    a=0;
    b=1;
    #5 c = a+b;
end 
initial begin
    a=0;
    #3 a=1;
end

bit a, b, c, d, e;
always @(a, b, c) begin
    e = a & b & c & d;
end

always @(posedge clk or posedge reset)
    if (reset)
        X1 = 0; // reset
	else
        X1 = X2;

always @(posedge clk or posedge reset)
    if (reset)
        X2 = 1;// set
	else
        X2 = X1;